Mars Rover Curiosity: Less Brainpower Than Apple's iPhone 5

You're conflating serveral things..
Space Qualification doesn't have a lot to do with rad hardening. It's more about manufacturing processes, reliability, and testing to work over wide temps. That off the shelf computer probably won't work at -40C or +75C, while the processors in most spacecraft do. ISS or shuttle isn't a good example: it's basically an office environment: it even has *air*.

Rad hardening is something else. And the space processors *ARE* more successful at hardening than garden variety CPUs. Take a look at the LEON3FT SPARC core, for instance (Available commercially as the Atmel AT697 or the Aeroflex UT699, or you can burn it into an Actel RTAX2000, if you like). It has register paths that have error correction, etc. The demonstrated performance in a radiation environment *is* better than the non FT version.

There's single event upsets (SEU) aka "bit flips" which EDAC or parity works nicely for. Your laptop flipping a bit might not be a big deal.. most consumer software has enough bugs and things that you just restart and move on. If the processor controlling the rocket motors during entry descent and landing screws up it's a $2.5B hole in the ground. So internal registers in the space CPUs tend to be triple redundant or other upset mitigations.

But that's really not the big issues. There are things like Latch-Up.. that particle going through causes a latchup, and the resulting high current at a small location melts the chip. Oops, dead. There are latchup immune designs and processes, and there are latchup monitor/reset circuits, but it's not universal.
There's single event gate rupture (SEGR) which is where a MOSFET gate gets punctured because the normal charge on it is close to the failure level in normal operation, and the particle deposits just enough more to push it over the edge. Would you notice this on a modern CPU? Maybe it's in the microcode for calculating square root or something and you wouldn't for a long long time.
We use a lot of FPGAs in spacecraft these days.. If it's a xilinx, that particle can flip a configuration bit, and now you've just programmed your FPGA to have two outputs connected to the same "wire" and they have opposite values. Oops some dead gates now, or if it's bad enough dead chip.

ISS is a benign radiation environment.. about a Rad(Si) per year or so. There are *humans* on ISS, after all. After all 600 Rad will kill someone in days, 100 Rad will make them pretty sick. A typical design dose for a Mars mission might be 20kRad. For going to Jupiter, maybe a MegaRad?

But even in that benign radiation environment, a lot of COTS equipment will fail, and there's no way to predict, short of test. So they take all those COTS widgets and run them in a proton beam and figure out what the mean time til failure is. If it's long enough, you send it up to ISS and have at it. There's an awful lot of stuff that has "expected life on ISS" of something like 90-180 days. Google for the papers or look at the website http://www.klabs.org where a lot of this stuff is collected. 180 days on ISS is plenty if you're sending new stuff up on a regular basis. Even at $100k/kilo, that's pretty inexpensive to just send a new iPad up every few months if one dies.

If you're sending a billion bucks to Mars for 10 years, I think you might want something a bit better.

Source: http://rss.slashdot.org/~r/Slashdot/slashdotScience/~3/hPyRX9E6AnM/story01.htm

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